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REGISTERS

The Registers on the CPU have 5 main parts the PC (Program Counter) the CIR (Current Instruction Register) the MAR (Memory Address Register) the MBR (Memory Buffer Register) and the FR (Flag register) or SR (status register)

Program Counter (PC)

 The program counter is where the address of the next instruction to be executed is held, Sometime called the sequence control register (SCR)

 

Current Instruction Register (CIR)

 The Current instruction register (CIR) holds both the operator and the operand of the current instruction.               E.g. LDA 1000

LDA is the operator (command) and 1000 is the operand (or data)

 

Memory Address Register (MAR)

 The memory address register is where the address of the memory location from which data will be read or written is held.

It may even hold the address of an instruction to be fetched or the address of data to be processed

At the Fetch stage all the data that held in the PC (Program Counter) are copied to the MAR (Memory Address Register)

 

Memory Buffer Register (MBR)

 The Memory Buffer Register temporarily stores data data that is needed to be read or written to the memory.

i.e the instruction LDA 1000 is placed here then the next stage its put into the CIR (Current Instruction Register) where it will be decoded. once decoded, 1000 (1000 is the address within the memory) is placed in the MAR (Memory Address Register) and finally the contents at address 1000 will be copies to the MBR (Memory buffer Register)

 

NB  The  MBR is sometimes called the memory data register (MDR).

 

Both the MBR and MAR act as buffers because the CPU is faster than memory.

 

 

The Flag Register (FR) or Status Register (SR)

 The Flag register or status register contains bits acting as flags, which may be set as the consequence of the result of an instruction. E.g. overflow flag, negative flag, zero flag etc. The status of these bits may be used by the CPU to branch from a given sequence of instructions. NB Necessary for IF type statements.